View W91812XN_1720907.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

w91820n series 13-memory tone/pulse dialer with handfree, lock and hold functions publication release date: may 1999 - 1 - revision a2 general description the w91820n is a series of tone/pulse switchable telephone dialers with 13 memory, keytone, hold, lock, and handfree dialing control features. these chips are fabricated using winbond's high- performance cmos technology and thus offer good performance in low-voltage, low-power operations. features ? tone/pulse switchable dialer ? two by 32 digits redial and save memory ? three by 32 digits one-touch direct repertory memory ? ten by 32 digits two-touch indirect repertory memory ? pulse-to-tone (*/t) keypad for long distance call operation ? chain dialing ? uses 5 5 keyboard ? easy operation with redial, flash, pause, and */t keypads ? pause, p t (pulse-to-tone) can be stored as a digit in memory ? dialing rate:10 pps or 20 pps by mask option ? minimum tone output duration: 93 ms (unless w91824n/an is 87 ms) ? minimum intertone pause: 93 ms (unless w91824n/an is 87ms) ? pause time: 3.6 sec. (unless w91824n/an is 2.0 sec.) ? flash break time (73 ms, 100 ms, 300 ms, or 600 ms) selectable by keypad; pause time is 1.0 s ? make/break ratio (2:3 or 1:2) selectable by mode pin ? mute key for speech network mute ? no key will be accepted except the "hold" key when in the hold mode ? key tone output for valid keypad entry recognition ? on-chip power-on reset ? uses 3.579545 mhz crystal or ceramic resonator ? 20, or 22-pin dual-in-line plastic package ? the different dialers in the w91820n series are shown in the following table: type no. pulse (pps) lock key tone handfree dialing package (pins) w91820n/824n 10 - -20 w91820an/824an 10 - ? 22 w91820ln 10 -- 20 w91820aln 10 - 22 w91822n 20 - -20 w91822an 20 - ? 22 note: w91824n/824an for french only.
w91820n series - 2 - pin configurations h/p mute w91820ln 1 18 r4 c1 c2 c3 c4 ss v 2 3 4 5 6 13 14 15 16 17 r1 r2 r3 mode dd v 7 8 9 10 11 12 dtmf hks xt t/p mute dp xt lock 19 20 n.c. w91820aln 1 18 r4 c1 c2 c3 c4 ss v 2 3 4 5 6 13 14 15 16 17 r1 r2 r3 mode dd v 7 8 9 10 11 12 dtmf hks xt t/p mute dp xt lock 19 20 h/p mute 21 22 hfi hfo n.c. w91820n/822n /824n 1 18 r4 c1 c2 c3 c4 ss v 2 3 4 5 6 13 14 15 16 17 r1 r2 r3 mode dd v 7 8 9 10 11 12 dtmf hks xt t/p mute dp xt kt 19 20 h/p mute n.c. w91820an/822an /824an 1 18 r4 c1 c2 c3 c4 ss v 2 3 4 5 6 13 14 15 16 17 r1 r2 r3 mode dd v 7 8 9 10 11 12 dtmf hks xt t/p mute dp xt kt 19 20 h/p mute 21 22 hfi hfo n.c.
w91820n series publication release date: may 1999 - 3 - revision a2 pin description symbol 20-pin 22-pin i/o function column- row inputs 1 ? 4 & 17 ? 20 1 ? 4 & 19 ? 22 i the keyboard input is compatible with a standard 5 5 keyboard, an inexpensive single contact (form a) keyboard, and electronic input. in normal operation, any single button can be pushed to produce dual tone, pulses, or functions. activation of two or more buttons will result in no response except for a single tone. xt 8 8 i a built-in inverter together with an inexpensive 3.579545 mhz crystal supplies the oscillator. the oscillator stops when there is no keypad input. the crystal frequency deviation is 0.02%. xt 9 9 o crystal oscillator output pin. t/p mute 10 10 o the t/p mute is a conventional cmos n-channel open drain output. the output transistor turns on with a low level during a dialing sequence (both pulse and tone mode). otherwise, it is off. n.c. 16 18 - no connect mode 14 16 i connecting the mode pin to v ss places the dialer in tone mode. connecting the mode pin to v dd places the dialer in pulse mode with an m/b ratio of 40:60. leaving the mode pin floating places the dialer in pulse mode with an m/b ratio of 33.3:66.7. hks 11 13 i the hks (hook switch) input is used to sense whether the handset is on-hook or off-hook. in on-hook state, hks = 1: chip is in sleeping mode, no operation. in off-hook state, hks = 0: chip is enabled for normal operation. hks pin is pulled to v dd by internal resistor. kt (w91820n/8 20an/822n/ 824n/822an /824an only) 5 5 o the key tone output is a conventional cmos inverter. the key tone is generated when any valid key is pressed; the kt pin generates a 1.2 khz square wave at 35 ms. when no key is pressed, the kt pin remains in low state.
w91820n series - 4 - pin description, continued symbol 20-pin 22-pin i/o function lock (w91820ln/ 820aln only) 5 5 i the function of this terminal is to prevent "0" dialing and "9" dialing under pabx system long distance call control. when the first key input after reset is 0 or 9, all key inputs, including the 0 or 9 key, become invalid and the chip generates no output. the telephone is reinitialized by a reset. the function of the lock pin is shown below: lock pin function v dd v ss floating "0", "9" dialing inhibited normal dialing mode "0" dialing inhibited h/p mute 6 6 i the h/p mute is a conventional inverter output. during pulse dialing, flash break or hold period, this output is active high; otherwise, it remains in low state. dp 12 14 o n-channel open drain dialing pulse output. flash key will cause dp to be active in either tone mode or pulse mode. in lock mode, the dp remains low for 300 ms durint off- hook delay time. the timing diagram for pulse mode is shown in figure 1(a, b). dtmf 13 15 o during pulse dialing, this pin remains in a low state regardless of the keypad input. in tone mode, it will output a dual or single tone. a detailed timing diagram for tone mode is shown in figure 2(a, b). r1 r2 r3 r4 c1 c2 c3 specified 697 770 852 941 1209 1336 1477 699 766 848 948 1216 1332 1472 actual +0.28 -0.52 -0.47 +0.74 +0.57 -0.30 -0.34 error % output frequency v dd , v ss 15, 7 17, 7 i power input pins for the dialer chip. v dd is the power and v ss is the ground.
w91820n series publication release date: may 1999 - 5 - revision a2 pin description, continued symbol 20-pin 22-pin i/o function hfi , hfo - 11, 12 i, o handfree control pins. a low pulse on the hfi input pin toggles the handfree control state. the status of the handfree control state is listed in the following table: hook sw. - on hook off hook on hook off hook off hook current state next state hfo low high high - low high input hfi hfi hfi off hook on hook on hook hfo high low low low low high dialing yes no yes yes no yes the hfi pin is pulled to v dd by an internal resistor. a detailed timing diagram is shown in figure 3. block diagram dtmf xt xt hks mode ram counter system clock generator location latch d/a row & column programmable counter data latch & decoder read/write hfi row (r1 ~ r4, vx/r5) column (c1 ~ c4, vss) control logic pulse control logic keyboard interface converter lock t/p mute hfo dp kt h/p mute
w91820n series - 6 - functional description keyboard operation c1 c2 c3 c4 v ss 1 2 3 s em1 r1 4 5 6 f4 em2 r2 7 8 9 a em3 r3 */ t 0 # r/p save r4 f1 f2 f3 h vx/r5 ? s: store function key ? a: indirect repertory memory dialing function key ? h: hold function key ? r/p: redial and pause function key ? */t: * in tone mode and p t key in pulse mode ? save: save function key for one-touch 32-digit memory ? em1, ..., em3: emergency one-touch memory key ? f1, ..., f4: flash function keys: f1 = 600 ms, f2 = 300 ms, f3 = 73 ms, f4 = 100 ms; all flash pause time is 1.0 ms note: d1, ..., dn, d1`, ..., dn`, * /t, #, mn: em1, ..., em3, ln: 0 ? 9 normal dialing off hook (or on hook & hfi ), d1 , d2 , , dn 1. d1, d2, , dn will be dialed out. 2. dialing length is unlimited, but redial is inhibited if length oversteps 32 digits in normal dialing. redialing dialing off hook (or on hook & hfi ,d1,d2 , , dn , busy come on hook , off hook (or on hook & hfi ), r/p the r/p key can execute redial function only as first key-in after off-hook. otherwise, it will invoke the pause function. ? the below cases are selected by mask option for w91824n/an (french version) only. in tone mode: d1, d2, d3,*(or #), d4, d5, d6 the chip will only output d1, d2, d3 and ignore *(or #), d4, d5, d6. in pulse mode: d1, d2, d3, */t, d4, d5, d6
w91820n series publication release date: may 1999 - 7 - revision a2 the chip will only output d1,d2,d3 and do not transfer to tone mode. in pulse mode, the # sign does not effect. number store 1. off hook (or on hook & hfi ), d1 , d2 , ..., dn , s , s , emn (or a , ln or save ) a. the dialing out of d1 to dn must first be finished before the s key is pressed. b. d1, d2, , dn will be stored in memory location mn or saved and then dialed out. 2. off hook (or on hook & hfi ), s , d1 , d2 , ..., dn , s , emn (or a , ln or save ) a. d1, d2, , dn will be stored in memory location, mn (or saved), but will not be dialed out. b. r/p and */t keys can be stored as a digit in memory, but the r/p key cannot be the first digit. in store mode, r/p is the pause function key. c. the store mode is released after the store function is executed or when the state of the hook switch changes or the flash function is executed. save off hook (or on hook & hfi ), d1 , d2 , ..., dn , save a. d1, d2, ..., dn will be dialed out. b. if the dialing of d1 to dn is finished, pressing save will duplicate d1 to dn to the save memory. off hook (or on hook & hfi ), come on off hook (or on hook & hfi ), save c. d1 to dn will be dialed out after the save key is pressed. repertory dialing procedure one-touch direct repertory dialing: off hook (or on hook & hfi ), mn (or save )
w91820n series - 8 - two-touch direct repertory dialing: off hook (or on hook & hfi ), a , ln access pause off hook (or on hook & hfi ), d1 , d2 , r/p , d3 , ..., dn 1. the pause function can be stored in memory. 2. the pause function is executed with normal dialing, redialing or memory dialing. 3. the pause function timing diagram is shown in figure 6. pulse-to-tone (*/t) off hook (or on hook & hfi ), d1 , d2 , ..., dn , */t , d1' , , d2' , ..., dn' 1. if the mode switch is set in pulse mode, then it will perform case a: d1, d2, ---, dn, pause (3.6 sec), d1', d2', ---, dn' (pulse) (tone) case b: (only for french version) d1, d2, ---, dn, * , d1', d2', ---, dn' (pulse) (tone) 2. if the mode switch is set in tone mode, then the output signal will be: d1, d2, ---, dn, * , d1', d2', ---, dn' (tone) 3. it can be reset to pulse mode only if on hook is active. this is because it remains in tone mode when the digits have been dialed out. 4. the function timing diagram is shown in figure 7. flash off hook (or on hook & hfi ), fn 1. fn = f1 ? f4. if fn is pressed, the dialer will execute a flash break time of 600 ms (f1), 300 ms (f2), 73 ms (f3) or 100 ms (f4) and a pause time of 1.0 second, after which the next digit is dialed out. 2. the flash key has the first priority of the keyboard function only one flash key will be released to the user. 3. when the flash key is key in, the system will return to the initial state after the flash pause time is finished. 4. the flash function timing diagram is shown in figure 8.
w91820n series publication release date: may 1999 - 9 - revision a2 cascaded dialing off hook (or on hook & hfi ) 1. normal dialing + repertory dialing + normal dialing (1st sequence) (2nd sequence) 2. repertory dialing + normal dialing + repertory dialing (1st sequence) (2nd sequence) 3. redialing + normal dialing + repertory dialing (1st sequence) (2nd sequence) redialing is valid only for the first key-in. the second sequence should not be operated until the first sequence is dialed out completely. absolute maximum rating parameter symbol rating unit dc supply voltage v dd ? v ss -0.3 to +7.0 v v il v ss -0.3 v input/output voltage v ih v dd +0.3 v v ol v ss -0.3 v v oh v dd +0.3 v power dissipation p d 120 mw operation temperature t opr -20 to +70 c storage temperature t stg -55 to +150 c note: exposure to conditions beyond those listed under absolute maximum ratings may adversely affect the life and reliability of the device.
w91820n series - 10 - dc characteristics (v dd ? v ss = 2.5v, fosc. = 3.58 mhz, t a = 25 c, all outputs unloaded) parameter sym. conditions min. typ. max. unit operating voltage v dd - 2.0 - 5.5 v operating current i op tone - 0.4 0.6 ma pulse - 0.2 0.4 ma standby current i sb hks = 0, no load & no key entry --15 a memory retention current i mr hks = 1, v dd = 1.0v --1 a tone output voltage v to row group, r l = 5 k ? 130 150 170 mvrms pre-emphasis col/row, v dd = 2.0 ? 5.5v 123 db dtmf distortion thd r l = 5 k ? , v dd = 2.0 ? 5.5v - -30 -23 db dtmf output dc level v tdc r l = 5 k ? , v dd = 2.0 ? 5.5v 1.0 - 3.0 v dtmf output sink current i tl v to = 0.5v 0.2 - - ma dp output sink current i pl v po = 0.5v 0.5 - - ma t/p mute output sink current i ml v mo = 0.5v 0.5 - - ma kt drive/sink current i kth v kth = 2.0v 0.5 - - ma i ktl v ktl = 0.5v 0.5 - - ma hfo drive/sink current i hfh v hfh = 2.0v 0.5 - - ma i hfl v hfl = 0.5v 0.5 - - ma h/p mute i hph v hph = 2.0v 0.5 - - ma drive/sink current i hpl v hpl = 0.5v 0.5 - - ma keypad input drive current i kd v i = 0v 4 - - a hks pull high resister rhks 300 500 - k ? keypad input sink current i ks v i = 2.5v 200 400 - a keypad resistance - - 5.0 k ?
w91820n series publication release date: may 1999 - 11 - revision a2 ac characteristics parameter sym. conditions min. typ. max. unit key-in debounce t kid --20-ms key release debounce t krd --20-ms on-hook debounce t ohd lock mode - 20 - ms unlock mode - 150 - ms pre-digit pause1 t pdp1 mode pin = v dd -40-ms 10 pps mode pin = floating - 33.3 - ms pre-digit pause2 t pdp2 mode pin = v dd -20-ms 20 pps mode pin = floating - 16.7 - ms inter digit pause (auto dialing) t idp 10 pps (w91820n/w91820an/820ln /820aln/824n/824an only ) - 800 - ms 20 pps (w91822n/822an only) - 500 - ms interdigit pause t idp 10 pps - 800 - ms (auto dialing) 20 pps - 500 - ms make/break ratio m:b mode pin = v dd - 40:60 - % mode pin = floating - 33.3:66.7 - % tone output duration t td --93-ms intertone pause t itp --93-ms flash break time t fb f1 - 600 - ms f2 - 300 - f3 - 73 - f4 - 100 - flash pause time t fp - - 1.0 - s pause time t p - - 3.6 - s (w91824n/an only) - 2.0 - s key tone frequency f kt - - 1.2 - khz key tone duration t ktd --35-ms one-key redialing pause time t rp - - 600 - ms one-key redialing break time t rb - - 2.2 - s first key-in delay t fkd lock only - 300 - ms notes: 1. crystal parameters suggested for proper operation are rs < 100 ? , lm = 96 mh, cm = 0.02 pf, cn = 5 pf, cl = 18 pf, fosc. = 3.579545 mhz 0.02%. 2. crystal oscillator accuracy directly affects these times.
w91820n series - 12 - timing waveforms 42 t kid b m t idp t idp t pdp t kid t idp t pdp 2 hks key in dp t/p mute m b low osc. osc. h/p mute dtmf osc. kt figure 1(a). pulse mode tming diagram (normal dialing without lock function) 42 t idp t kid t idp t pdp 2 key in m b h/p mute osc. osc. low dtmf osc. (long mute) 300 ms t fkd hks dp t/p mute m b idp t figure 1(b). pulse mode timing diagram (normal dialing with lock function)
w91820n series publication release date: may 1999 - 13 - revision a2 timing waveforms, continued r/p b m t idp t idp t pdp t idp t pdp low osc. h/p mute dtmf osc. on hook kt m b key in dp t/p mute hks (long mute) figure 1(c). pulse mode timing diagram (auto dialing without lock) r/p t idp t idp t pdp h/p mute low osc. dtmf osc. m b 300 ms t fkd hks key in dp t/p mute (long mute) figure 1(d).pulse mode timing diagram (auto dialing with lock function)
w91820n series - 14 - timing waveforms, continued t kid t td high osc. osc. dtmf osc. kt t itp t krd t itp t krd t kid t itp t krd low 32 6 5 h/p mute dtmf hks key in t/p mute figure 2(a). tone mode timing diagram high osc. osc. dp t itp t krd t itp t krd t kid t itp t krd low 32 6 5 t td 300 ms t fkd dtmf osc. h/p mute hks key in t/p mute figure 2(b). tone mode timing diagram (normal dialing with lock function)
w91820n series publication release date: may 1999 - 15 - revision a2 timing waveforms, continued t td high osc. t itp low r/p on hook t kid t itp tt < t ohd dp dtmf osc. kt h/p mute hks key in t/p mute figure 2(c). tone mode timing diagram (auto dialing without lock function) t td high osc. itp low r/p t itp t t < t ohd 300 ms t t fkd dp dtmf osc. h/p mute hks key in t/p mute t kid figure 2(d). tone mode timing diagram (auto dialing with lock function)
w91820n series - 16 - timing waveforms, continued t td high osc. t itp low r/p on hook t kid t t > t ohd (return to initial state) dp dtmf osc. kt h/p mute hks key in t/p mute figure 2(c). tone mode timing diagram with on-hook debounce (auto dialing) high chip enable t/p mute h/p mute low hks h key off hook on hook note: the h key can not be enabled during chip dissable. hfi hfo figure 3(a)
w91820n series publication release date: may 1999 - 17 - revision a2 timing waveforms, continued high off hook chip enable t/p mute h/p mute hks h key hfi hfo figure 3(b) note: the h key and hfi inputs will toggle the hfo signal. the first time hfi or h key are activated, the hfo signal will go high and the previous active input will be neglected. high on hook chip enable t/p mute h/p mute hks h key hfi hfo figure 3(c) note: the hks signal change of state from high to low will initialize both the hfo and h/p mute signals.
w91820n series - 18 - timing waveforms, continued 4 b m t idp t pdp dp t fkd t kid t t w91820n series publication release date: may 1999 - 19 - revision a2 timing waveforms, continued 42 t kid b m t idp t idp t pdp t idp t pdp low osc hks key in dp t/p mute h/p mute dtmf osc. m b kt r/p 2 t p figure 6. pause function timing diagram 42 t kid b m t idp t idp t pdp osc. hks key in dp t/p mute h/p mute dtmf osc. m b kt */t 8 t p t itp figure 7(a). pulse to tone function timing diagram
w91820n series - 20 - timing waveforms, continued hks h/p mute dtmf osc. oscillation t/p mute 42 t kid b m t idp t idp t key in dp m b */t 8 pdp t itp itp t *8 kt figure 7(b). pulse to tone function timing diagram (only for french version) r/p b m t idp t idp t pdp low osc hks key in dp t/p mute h/p mute dtmf osc. on hook kt m b figure 7(c). pulse mode auto-redialing timing diagram continue figure 6(b). (only for french version)
w91820n series publication release date: may 1999 - 21 - revision a2 timing waveforms, continued t td high osc dp t/p mute h/ p mute dtmf osc. kt t itp low r/p hks key in on hook t kid 4 2 figure 7(d). tone mode auto-redialing timing diagram continue figure 6(b). (only for french version) fn t kid osc. hks key in dp t/p mute h/p mute dtmf osc. kt t fb low low t fp figure 8. flash operation timing diagram
w91820n series - 22 - headquarters no. 4, creation rd. iii, science-based industrial park, hsinchu, taiwan tel: 886-3-5770066 fax: 886-3-5792766 http://www.winbond.com.tw/ voice & fax-on-demand: 886-2-27197006 taipei office 11f, no. 115, sec. 3, min-sheng east rd., taipei, taiwan tel: 886-2-27190505 fax: 886-2-27197502 winbond electronics (h.k.) ltd. rm. 803, world trade square, tower ii, 123 hoi bun rd., kwun tong, kowloon, hong kong tel: 852-27513100 fax: 852-27552064 winbond electronics north america corp. winbond memory lab. winbond microelectronics corp. winbond systems lab. 2727 n. first street, san jose, ca 95134, u.s.a. tel: 408-9436666 fax: 408-5441798 note: all data and specifications are subject to change without notice.

▲Up To Search▲

Price & Availability of W91812XN

	To Download W91812XN Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .